ESSDERC 2010 : 13-17 September 2010 - Sevilles- Spain

ESSDERC & ESSCIRC 2010 will be held in Seville, Spain from 13-17 September 2010.
--> go to the 2010 Seville website



ESSDERC 2010 : General scope of the conference

The main themes for original contributions to be submitted to ESSDERC 2010 include (but are not limited to) the following:

Advanced CMOS Devices

Ultimate CMOS scaling for high performance, low power and low voltage devices, novel MOS device architectures (double and multiple gate, vertical, ballistic), circuit/device interaction and co-optimization, high-mobility channel engineered devices, SOI, SGOI, and SiON devices; SiGe, Ge, and strained devices. 3D integrated circuits.

Process & Integration

Front-end and back-end processes for fabrication of logic memory and 3D integrated circuits, including: substrate technologies, gate dielectrics, high k, gate stack, junction technology, cleaning and surface preparation, litography, etching, isolation technologies, thin dielectrics, shallow junctions, silicides, 3D integration, interconnects, low k dielectrics, advances in integration for ULSI; SOI, SGOI; advanced/novel memory process integration; logic and mixed-mode IC manufacturing; RF integration (passives, active devices); photonics integration; multilevel interconnects, advanced packaging.

Telecommunication & Power Devices

RF CMOS, analog and mixed signal devices, passives, antennas, filters, RF MEMS, Bipolar, BiCMOS, compound semiconductors (GaAs, InP, GaN, SiC, alloys) and optoelectronic devices, smart power devices, high-voltage, high power devices, high temperature operation, SiC devices, CMOS compatible power devices, IC cooling. Discrete and integrated high power/current/voltage devices. Integrated RF components including inductors, capacitors, and switches.

Modeling and Simulation

Numerical, analytical and statistical modeling of solid-state electronic and optoelectronic devices, quantum mechanical and non-stationary transport phenomena, ballistic transport, compact circuit modeling for devices and interconnects, modeling and simulation of front-end and back-end fabrication processes, electro-thermal modeling and simulation.

Charactrization, Reliability and Yield

Characterization techniques, parameter extraction, advanced test structures and methodologies, reliability issues for new materials and devices (reliability of high-k and low-k materials), reliability of advanced interconnects, ESD, soft errors, noise and mismatch behavior, bias temperature inestabilities, EMI, defect monitoring and control, metrology, impact of back-end processing on devices, manufacturing technologies for reliability, physics of failure analysis.

Memories

Novel memory cell concepts, embedded and stand-alone memories, DRAM, FeRAM, MRAM, PCRAM, CBRAM, Flash, SONOS, nanocrystal memories, single and few electron memories, 3D IC stacks, organic memories, NEMS-based device, 3D integration, reliability and modeling.

MEMS, Displays and SoC

Design, fabrication, modeling, reliability and packaging of all physical sensors and MEMS categories, bio-sensors for chemical, molecular and biological applications, BioMEMS, devices and technologies for lab-on-chip, integration of detectors, sensors, and actuators, CCDs and CMOS imagers, optical on chip communication, display technologies, TFTs, organic electronics, flexible substrate electronics, SoC and SiP packaging, microsystem packaging. Topics of interest in the MEMS area include resonators, switches, and passives for RF applications, integrated sensors, micro-optical devices, micro-fluidic and biomedical devices, micro power generators and energy harvesting devices, with particular emphasis on integrated implementations.

Emerging non-CMOS devices and technologies

Nanotubes, nanowires and nanoparticles for electronic, optoelectronic and sensor applications, materials and device related issues, single-electron, molecular and quantum devices, nanophotonics, spintronics, self-assembling methods, photonic devices. New device characterization techniques and performance evaluation methodologies.

To further emphasize the interactions between the device and circuits communities especially in the domain of emerging technologies, the conference will offer joint sessions.

These sessions will focus on topics at the boundary between design and technology depending on the submitted abstracts. Contributions are solicited (but not limited) in the areas of circuit design and simulation techniques for process variability in nm-scale technologies as well as of microwave components over silicon substrates.

 

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